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JOINT SEQUENCE ESTIMATION OF SYMBOL AND PHASE WITH HIGH TOLERANCE OF NONLINEARITY

机译:具有高非线性容忍度的符号和相位联合序列估计

摘要

A system may comprise circuitry that includes a sequence estimation circuit and a non-linearity modeling circuit. The circuitry may be operable to receive a single-carrier signal that was generated by passage of symbols through a partial response filter and through a non-linear circuit. The circuitry may be operable to generate estimated values of the symbols using the sequence estimation circuit and using the non-linearity modeling circuit. An output of the non-linearity modeling circuit may be equal to a corresponding input of the non-linearity modeling circuit modified according to a non-linear model that approximates the non-linearity of the non-linear circuit through which the received signal passed.
机译:系统可以包括电路,该电路包括序列估计电路和非线性建模电路。该电路可以可操作以接收通过符号通过部分响应滤波器和通过非线性电路而生成的单载波信号。该电路可用于使用序列估计电路和非线性建模电路来生成符号的估计值。非线性建模电路的输出可以等于根据近似接收信号通过的非线性电路的非线性的非线性模型修改的非线性建模电路的相应输入。

著录项

  • 公开/公告号EP2865151A4

    专利类型

  • 公开/公告日2016-03-09

    原文格式PDF

  • 申请/专利权人 MAGNACOM LTD.;

    申请/专利号EP20130822179

  • 发明设计人 ELIAZ AMIR;

    申请日2013-06-20

  • 分类号H04L27/06;H04L1;H04L25/03;

  • 国家 EP

  • 入库时间 2022-08-21 14:49:47

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