A cell for a silicon based photoelectric multiplier may comprise a substrate of a second conductivity type, a first layer of a first conductivity type, and/or a second layer of the second conductivity type formed on the first layer. The first layer and the second layer may form a first p-n junction, and the substrate may be configured such that in operation of the photoelectric multiplier from a quantity of light propagating towards a back side or side walls of the photoelectric multiplier, a negligible portion returns to a front side of the photoelectric multiplier.
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