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CENTRALIZED VARIABLE RATE SERIALIZER AND DESERIALIZER FOR BAD COLUMN MANAGEMENT
CENTRALIZED VARIABLE RATE SERIALIZER AND DESERIALIZER FOR BAD COLUMN MANAGEMENT
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机译:坏柱管理的集中式可变速率串行化器和反序列化器
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摘要
A memory circuit includes an array subdivided into multiple divisions, each connectable to a corresponding set of access circuitry. A serializer/deserializer circuit is connected to a data bus and the access circuitry to convert data between a (word-wise) serial format on the bus and (multi-word) parallel format for the access circuitry. Column redundancy circuitry is connect to the serializer/deserializer circuit to provide defective column information about the array. In converting data from a serial to a parallel format, the serializer/deserializer circuit skips words of the data in the parallel format based on the defective column information indicating that the location corresponds to a defective column. In converting data from a parallel to a serial format the serializer/deserializer circuit skips words of the data in the parallel format based on the defective column information indicating that the location corresponds to a defective column.
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