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MEMORY CELL, MEMORY DEVICE INCLUDING A PLURALITY OF MEMORY CELLS AND METHOD INCLUDING READ AND WRITE OPERATIONS AT A MEMORY CELL
MEMORY CELL, MEMORY DEVICE INCLUDING A PLURALITY OF MEMORY CELLS AND METHOD INCLUDING READ AND WRITE OPERATIONS AT A MEMORY CELL
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机译:存储器单元,包括多个存储器单元的存储器装置以及包括在存储器单元中进行读取和写入操作的方法
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摘要
A memory cell includes an inverter loop. The inverter loop includes a plurality of inverter pairs, wherein an output of each inverter pair is connected to an input of a next inverter pair in the loop. Each inverter pair includes a first inverter and a second inverter. An input of the first inverter provides the input of the inverter pair. An output of the second inverter provides the output of the inverter pair. An output of the first inverter is connected to an input of the second inverter. The memory cell further includes a plurality of passgate transistor pairs. Each passgate transistor pair includes a first passgate transistor connected to the input of the first inverter of the inverter pair associated with the passgate transistor pair and a second passgate transistor connected to the input of the second inverter of the inverter pair associated with the passgate transistor pair.
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