Circumventing load imbalance in parallel simulations caused by faulty hardware nodes

摘要

The present disclosure describes methods, systems, and computer program products for circumventing parallel processing load imbalance. One computer-implemented method includes generating a library function for a plurality of parallel-processing nodes, receiving timing statistics from each of the plurality of parallel-processing nodes, the timing statistics generated by executing the library function on each parallel-processing node, determining that a faulty parallel-processing node exists, signaling a simulator to checkpoint and stop a simulation executing on the parallel processing nodes, and removing the faulty parallel-processing node from parallel processing nodes available to execute the simulation.