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Circuits for self-reconfiguration or intrinsic functional changes of chips before vs. after stacking
Circuits for self-reconfiguration or intrinsic functional changes of chips before vs. after stacking
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机译:堆叠前后芯片自重配置或芯片固有功能变化的电路
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摘要
A method and system for testing one or more semiconductor structures, for example, chips or wafers, in a three-dimensional stack. The method and system includes controlling a logic signal of a first circuit in a first chip or wafer connected to a supply voltage to indicate a first state during pre-assembly testing of the first chip or wafer. The method and system further includes controlling the logic signal to indicate a second state when the first circuit is connected to a second circuit of a second chip or wafer resulting in a combined circuit. The combined circuit is in a three-dimensional chip or wafer stack during post-assembly testing of the three-dimensional chip or wafer stack.
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