首页>
外国专利>
Defect analysis system for error impact reduction
Defect analysis system for error impact reduction
展开▼
机译:缺陷分析系统,减少错误影响
展开▼
页面导航
摘要
著录项
相似文献
摘要
An apparatus includes a network interface, memory, and a processor. The processor is coupled with the network interface and memory. The processor is configured to analyze a first set of data associated with a plurality of data sources. Analyzing the first set of data associated with the plurality of data sources determines a plurality of relationships among the first set of data. The processor is configured to store indications of the plurality of relationships among the first set of data. An indication of a relationship indicates a possible software defect. The processor is configured to generate rules based, at least in part, on the first set of data associated with a plurality of data sources. A rule indicates a possible software defect.
展开▼