System and method for automated functional coverage generation and management for IC design protocols

摘要

A new approach is proposed that contemplates a system and method to support automated functional coverage generation and management for an IC design protocol. The proposed approach takes advantage of table-based high-level (e.g., transaction-level) specifications of the IC design protocol, wherein the state tables are readable and easily manageable (e.g., in ASCII format) in order to automatically generate functional coverage for the IC design protocol, which include but are not limited to, coverage points, protocol transitions, and/or transaction coverage. The automatically generated functional coverage is then verified via formal verification and simulated at the register-transfer level (RTL) during the coverage generation and management process. The coverage data from the formal verification and the simulation runs are then analyzed and used to guide and revise the IC design protocol in a coverage-based closed-loop IC design process.