APPARATUS TO IMPLEMENT PHYSICALLY UNCLONABLE FUNCTIONS ON FPGA

摘要

The present invention provides an apparatus for implementing a physical unclonable function circuit which implements the physical unclonable function circuit, used for cryptographic purposes such as device identification, key generation, etc., through a field programmable gate array (FPGA). The apparatus for implementing a physical unclonable function circuit comprises: a clock generating unit which generates clock signals based on retardation time generated from look-up table (LUT) gates inside the FPGA; an output generating unit which prevents predicting whether a previous flip-flop value is reflected or not by disposing the FPGA LUT between the flip-flops to have a similar setup time to a clock cycle; and a control module for controlling the entire circuit.