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PHASE GENERATOR BASED ON DELAY LOCK LOOP CIRCUIT AND DELAY LOCKING METHOD THEREOF
PHASE GENERATOR BASED ON DELAY LOCK LOOP CIRCUIT AND DELAY LOCKING METHOD THEREOF
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机译:基于延时锁定回路的相位发生器及其延时锁定方法
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摘要
The present invention relates to a phase generator based on a delay locked loop circuit and a phase generating method capable of preventing locking errors while realizing broadband by placing a delay timing on an optimal band depending on the result of comparing an input clock and an output clock. The phase generator comprises: a delay control unit for producing and outputting an oscillating control voltage based on the result of comparing a phase of an outer standard clock and feedback clock signals to the frequency; a course setting unit for setting a band region for locking errors based on preventing conditions; a regulator for adjusting a set voltage level corresponding to the band region of the course setting unit and outputting the same; and a voltage control delay line for converting and outputting a phase of at least one output clock and a voltage level based on the set voltage of the regulator and control voltage of the delay control unit.
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