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METHOD OF DESIGNING DVB-B2 LDPC DECODER USING OVERLAPPED DECODING SCHEME

机译:重叠编码方案设计DVB-B2 LDPC解码器的方法

摘要

The present invention relates to a decoder for low-density parity-check (LDPC) codes, including a bit node operation unit executing a bit node operation, a check node operation unit executing a check node operation, a control unit controlling the bit node operation and the check node operation, and a storage unit storing result values of the bit node operation and the check node operation. The control unit computes address offset values of storage units linked to a first node operation unit executing the operation first among the bit node operation and the check node operation and sequentially stores, based on the computed address offset values, result values from the first node operation unit in the storage units. The control unit arranges the computed address offset values in ascending order, extracts two address offset values having the largest difference from among neighboring address offset values in the arrangement, and sets the address with a smaller offset value among the two address offset values as a start address value for executing an operation of another node operation unit (a second node operation unit) while storing the result values from the first node operation unit, thereby allowing the operations of a bit node and a check node to overlap each other. Thus, the decoding time may be reduced.;COPYRIGHT KIPO 2016
机译:低密度奇偶校验(LDPC)码的解码器技术领域本发明涉及一种用于低密度奇偶校验(LDPC)码的解码器,包括执行位节点操作的位节点操作单元,执行校验节点操作的校验节点操作单元,控制该位节点操作的控制单元。存储单元存储位节点操作和校验节点操作的结果值。控制单元计算链接到位节点操作和校验节点操作中首先执行该操作的第一节点操作单元的存储单元的地址偏移值,并基于计算出的地址偏移值顺序存储来自第一节点操作的结果值存储单元中的单位。控制单元以升序排列所计算的地址偏移值,从布置中的相邻地址偏移值当中提取具有最大差异的两个地址偏移值,并将两个地址偏移值之中具有较小偏移值的地址作为开始。在存储来自第一节点操作单元的结果值的同时,执行另一个节点操作单元(第二节点操作单元)的操作的地址值,从而允许位节点和校验节点的操作彼此重叠。因此,可以减少解码时间。; COPYRIGHT KIPO 2016

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