Method of packet loss concealment in ADPCM codec and ADPCM decoder with PLC circuit

摘要

The invention relates to a method of packet loss concealment in ADPCM codec as well as to a ADPCM decoder with PLC circuit. The method is characterized in that in a predetermined transition period between the correct signal ( x dec ) and the substitute signal ( x PLC ) served by the PLC circuit the difference ( d PLC, m ) between the substitute signal ( x PLC,m ) and the computed prediction signal ( x pred, m ) in each subband is combined with the dequantized prediction error ( d dec, m ) to receive a dequantized combined prediction error ( d comb, m ) which is added to the predicted signal ( x pred, m ) to gain a combined transition signal ( x comb,m ) as basis for an output signal ( x out = x comb ) during the transition period as well as for adapting all decoder parameters. The method can be performed in an error combiner circuit having two inputs, one is connected to the output of the PLC circuit and one to the input of the ADPCM decoder, as well as two outputs, one for its output signal ( x comb ) and one for adapting the ADPCM decoder.