首页>
外国专利>
PARALLELIZED MAJORITY-LOGIC DECODING OF REED-MULLER CODES
PARALLELIZED MAJORITY-LOGIC DECODING OF REED-MULLER CODES
展开▼
机译:里德-穆勒码的无数次逻辑译码
展开▼
页面导航
摘要
著录项
相似文献
摘要
The arrangement has summing modules (SI-11 - SI-ED) in a plane linked with input terminals (I1-IN). Inputs of decision modules (MI-1- MI-E) are linked with an output of the summing modules. The summing modules are linked with a precise decision module i.e. AND-gate, in another plane of decision modules (MII-1 -MII-G) and the input terminals. Output terminals (O1-OG) are linked with a precise summing module i.e. XOR-gate in a third plane of summing modules (SIII-1 to SIII-G). Length and minimum clearance of a code, number of symbols of a data word are represented in the summing modules. An independent claim is also included for a method for decoding a data word by a fault-correcting, linear code.
展开▼