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VERIFICATION OF THE RESISTANCE OF AN ELECTRONIC CIRCUIT TO COVERT CHANNEL ATTACKS

机译:电子电路对隐蔽通道攻击的抵抗力验证

摘要

The invention relates to a method for verifying the sensitivity of an electronic circuit (6) executing a Rijndael type algorithm to hidden channel attacks, in which: each block of data to be encrypted or decrypted is masked by a first mask (m) before applying a block substitution nonlinear operation from a substitution table, and is then unmasked by a second mask after substitution; the substitution table is recalculated, block by block, before application of the non-linear operation, the processing order of the blocks of the substitution table being subjected to a random permutation; and a hidden channel attack is performed on the steps of block-by-block recalculation of the substitution table.
机译:本发明涉及一种用于验证执行Rijndael类型算法的电子电路(6)对隐藏信道攻击的敏感性的方法,其中:在应用之前,要加密或解密的每个数据块都被第一掩码(m)掩码替换表中的块替换非线性运算,然后在替换后被第二个掩码取消掩码;在应用非线性运算之前,逐块重新计算替换表,对替换表的块的处理顺序进行随机置换;并在替换表的逐块重新计算步骤上执行隐藏通道攻击。

著录项

  • 公开/公告号EP3139365A1

    专利类型

  • 公开/公告日2017-03-08

    原文格式PDF

  • 申请/专利权人 STMICROELECTRONICS (ROUSSET) SAS;

    申请/专利号EP20160155061

  • 发明设计人 BRUNEAU NICOLAS;

    申请日2016-02-10

  • 分类号G09C1;H04L9;H04L9/06;

  • 国家 EP

  • 入库时间 2022-08-21 14:02:14

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