PROBLEM TO BE SOLVED: To estimate the cell delay of a cell arranged in a semiconductor integrated circuit with high accuracy.SOLUTION: Provided is a method for generating a current source model 100 comprising an input terminal pair 110 having a first input terminal 111 and a second input terminal 112, an output terminal pair 120 having a first output terminal 121 and a second output terminal 122, a mirror capacitance Cm, an output capacitance Co, and a DC current source 101. The method includes: acquiring a first input current, a first input voltage, and a first output voltage when an input ramp voltage is applied to the input terminals and a DC voltage is applied to the output terminals; acquiring a second input current, a second input voltage, and a second output voltage when an input ramp voltage is applied to the input terminals and an output ramp voltage is applied to the output terminals; and computing the capacitance value of the mirror capacitance Cm on the basis of a difference between the first input current and the second input current and the inclination of the second output voltage.SELECTED DRAWING: Figure 2
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