首页> 外国专利> MECHANISM FOR COMMUNICATION BETWEEN ARCHITECTURAL PROGRAM RUNNING ON PROCESSOR AND NON-ARCHITECTURAL PROGRAM RUNNING ON EXECUTION UNIT OF THE PROCESSOR REGARDING SHARED RESOURCE

MECHANISM FOR COMMUNICATION BETWEEN ARCHITECTURAL PROGRAM RUNNING ON PROCESSOR AND NON-ARCHITECTURAL PROGRAM RUNNING ON EXECUTION UNIT OF THE PROCESSOR REGARDING SHARED RESOURCE

机译:在处理器上运行的体系结构程序与在共享资源上运行在处理器的执行单元上的非体系结构程序之间的通信机制

摘要

Functional units of a processor fetch and decode architectural instructions of an architectural program. The architectural instructions are of an architectural instruction set of the processor. An execution unit includes first and second memories, a register and processing units. The first memory holds data in rows with addresses. The second memory holds non-architectural instructions of a non-architectural program. The architectural and non-architectural instruction sets are distinct. The processing units execute the non-architectural program instructions to read data from the first memory, perform operations on the data read from the first memory to generate results, and to write the results to the first memory. The register holds information that indicates progress made by the non-architectural program during execution. The first memory is also readable and writable by the architectural program. The architectural program uses the information to decide where in the first memory to read/write data.
机译:处理器的功能单元获取并解码架构程序的架构指令。架构指令属于处理器的架构指令集。执行单元包括第一和第二存储器,寄存器和处理单元。第一存储器将数据保存在具有地址的行中。第二存储器保存非架构程序的非架构指令。建筑和非建筑指令集是不同的。处理单元执行非建筑程序指令以从第一存储器读取数据,对从第一存储器读取的数据执行操作以生成结果,并将结果写入第一存储器。该寄存器保存的信息表明执行过程中非体系结构程序的进度。第一存储器也可由体系结构程序读取和写入。体系结构程序使用该信息来确定在第一存储器中的哪个位置读取/写入数据。

著录项

  • 公开/公告号US2017103041A1

    专利类型

  • 公开/公告日2017-04-13

    原文格式PDF

  • 申请/专利权人 VIA ALLIANCE SEMICONDUCTOR CO. LTD.;

    申请/专利号US201615090705

  • 发明设计人 G. GLENN HENRY;TERRY PARKS;

    申请日2016-04-05

  • 分类号G06F15/82;G06F9/38;G06F9/30;

  • 国家 US

  • 入库时间 2022-08-21 13:52:01

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