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EFUSE BIT CELL, AND READ/WRITE METHOD THEREOF, AND EFUSE ARRAY

机译:避免位单元,及其读/写方法,并避免阵列

摘要

The present disclosure provides Efuse bit cells and read/write methods thereof, and Efuse arrays. An exemplary Efuse bit cell includes a data latch configured to latch data of the Efuse bit cell, having two branches with a fuse disposed in a first branch and a resistor disposed in a second branch; a selection controller configured to control connections between one terminal of the first branch and a power source and between one terminal of the second branch and the power source, another terminal of the first branch and another terminal of the second branch being connected to ground; a first diode and a second diode, one of the first diode and the second diode being configured to input a write data signal; and a pass unit configured to transmit data stored in the Efuse bit cell and output a bit line signal.
机译:本公开提供了Efuse位单元及其读取/写入方法,以及Efuse阵列。示例性的Efuse位单元包括:数据锁存器,被配置为锁存所述Efuse位单元的数据,其具有两个分支,其中,熔丝布置在第一分支中,并且电阻器布置在第二分支中。选择控制器,被配置为控制第一分支的一个端子和电源之间以及第二分支的一个端子和电源之间的连接,第一分支的另一个端子和第二分支的另一个端子接地。第一二极管和第二二极管,第一二极管和第二二极管中的一个被配置为输入写数据信号;通过单元,被配置为发送存储在Efuse位单元中的数据并输出位线信号。

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