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Techniques for efficient GPU triangle list adjacency detection and handling

机译:高效的GPU三角列表邻接检测和处理技术

摘要

An apparatus may include a memory to store a set of triangle vertices in a triangle, a processor circuit coupled to the memory and a cache to cache a set of triangle vertex indices corresponding to triangle vertices most recently transmitted through a graphics pipeline. The apparatus may also include an autostrip vertex processing component operative on the processor circuit to receive from the memory the set of triangle vertices, compare an index for each vertex of the set of triangle vertices to determine matches to the set of cached triangle vertex indices, and shift a single vertex index into the cache, the single vertex index corresponding to a vertex miss in which a given vertex of the set of triangle vertices does not match any vertex index of the set of cached triangle vertex indices when exactly two matches to the set of cached triangle vertex indices are found.
机译:一种设备可以包括:存储器,用于在三角形中存储一组三角形顶点;处理器电路,其耦合到所述存储器;以及高速缓存器,用于缓存与最近通过图形管线传输的三角形顶点相对应的一组三角形顶点索引。该装置还可以包括在处理器电路上操作的自动条形顶点处理组件,以从存储器中接收该组三角形顶点,比较该组三角形顶点中的每个顶点的索引,以确定与该组缓存的三角形顶点索引的匹配,并将单个顶点索引移到缓存中,该单个顶点索引对应于其中三个三角形顶点集的给定顶点与该一组缓存三角形顶点索引集的任何顶点索引都不匹配的顶点未命中的顶点缺失找到一组缓存的三角形顶点索引。

著录项

  • 公开/公告号US9619859B2

    专利类型

  • 公开/公告日2017-04-11

    原文格式PDF

  • 申请/专利权人 INTEL CORPORATION;

    申请/专利号US201514741121

  • 发明设计人 THOMAS A. PIAZZA;PETER L. DOYLE;

    申请日2015-06-16

  • 分类号G06T1/60;G06T15/00;G06T17/20;

  • 国家 US

  • 入库时间 2022-08-21 13:46:43

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