Separating most significant bits and least significant bits in charge storage elements of an analog-to-digital converter

摘要

In an example embodiment, an apparatus includes: a first sampling capacitor to switchably couple between an input analog voltage, a reference voltage (V_REF) and a ground voltage; a second sampling capacitor to switchably couple between the reference voltage and the ground voltage; and a comparator having a first input terminal to couple to the first sampling capacitor and a second input terminal to couple to the second sampling capacitor. The comparator may be configured to compare a voltage level at the second input terminal to a sum voltage based at least in part on the input analog voltage to generate at least one bit of a digital output.