Successive approximation ADC and control method thereof

摘要

Successive approximation ADC includes a digital-to-analog converter, a comparator, a comparison unit, a timing unit and a control logic circuit. The digital-to-analog converter converts a digital signal to a reference analog signal. The comparator compares an analog input signal with a reference analog voltage and generates a comparing signal. The comparison unit generates a comparison result signal according to the comparing signal. The timing unit generates a clock signal, and sequentially enables N supplementary clock signals corresponding to N bits when the comparison result signal is enabled. The control logic circuit updates the digital signal according to the comparing signal, and generates N bits of digital value sequentially from the most significant bit to the least significant bit, and then determines whether the digital value is valid according to whether the N^th supplementary clock signal corresponding to the least significant bit is enabled.