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Accelerated and accuracy-enhanced delay and noise injection calculation for analysis of a digital circuit using grid computing

机译:利用网格计算对数字电路进行分析的加速和增强精度的延迟和噪声注入计算

摘要

A computer system with one or more processors and memory performs a breadth-first-search for an analysis of a digital circuit that includes a plurality of components. The computer system identifies two or more N generation components, initiates processing of the two or more N generation components, and subsequent to initiating the processing of the two or more N generation components, receives results of processing a subset, less than all, of the two or more N generation components. Prior to receiving results of processing all of the N generation components, the computer system identifies one or more N+1 generation components, and initiates processing of the one or more identified N+1 generation components. Subsequently, the computer system receives results of processing at least a subset of the one or more identified N+1 generation components.
机译:具有一个或多个处理器和存储器的计算机系统执行广度优先搜索,以分析包括多个组件的数字电路。该计算机系统识别两个或多个N世代组件,启动两个或多个N世代组件的处理,并且在启动两个或多个N世代组件的处理之后,接收处理该子集的少于全部的子集的结果。两个或多个N生成组件。在接收到处理所有N个世代成分的结果之前,计算机系统识别一个或多个N + 1世代成分,并启动对一个或多个识别出的N + 1世代成分的处理。随后,计算机系统接收处理一个或多个所识别的N + 1生成分量的至少一个子集的结果。

著录项

  • 公开/公告号US9697323B2

    专利类型

  • 公开/公告日2017-07-04

    原文格式PDF

  • 申请/专利权人 SHANG-WOO CHYOU;

    申请/专利号US201514811663

  • 发明设计人 SHANG-WOO CHYOU;

    申请日2015-07-28

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 13:42:14

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