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VIRTUALIZATION-BASED EMBEDDED HARDWARE DEVELOPMENT AND VERIFICATION FRAMEWORK STRUCTURE
VIRTUALIZATION-BASED EMBEDDED HARDWARE DEVELOPMENT AND VERIFICATION FRAMEWORK STRUCTURE
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机译:基于虚拟化的嵌入式硬件开发和验证框架结构
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摘要
The present invention relates to a system for developing and verifying hardware intellectual properties (IP) for an embedded system, and more specifically, to a virtualization-based embedded hardware development and verification framework structure. According to an embodiment of the present invention, the virtualization-based embedded hardware development and verification framework structure includes: a system emulation tool generating hardware interface emulation for recognizing a bus connected to a platform based on a field programmable gate array (FPGA) to be verified and a virtualized embedded system hardware to provide an operating environment for a higher operating system; a target system tool which is arranged on the system emulation tool and at least includes the operating system of a target system mounted with the FPGA-based platform to be verified, a root file system, and a boot loader; a performance evaluation app tool which is executed on the target system tool to evaluate the FPGA-based platform performance; and a system software tool for the FPGA-based platform executed on the target system tool.;COPYRIGHT KIPO 2017
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