Circuits and Methods for Filtering Inter-Symbol Interference for SERDES Applications

摘要

Circuitry for filtering inter-symbol interference in an integrated circuit is described. The circuit may comprise digital samples of the input signal ( /RTI coupled to receive the first stage RTI ID = 0.0 308 &The first stage is based on the digital samples and comprises first decision outputs ). The second stage 310 is coupled to receive digital samples of the input signal. The second stage includes first decision outputs ( /RTI and the detected intersymbol interference associated with the digital samples of the input signal and the first decision outputs (Output data) on the basis of the first decision outputs (output data). A method for filtering inter-symbol interference in an integrated circuit is also described.;