首页> 外国专利> LOAD A LOCK-BASED AND SYNCH-BASED METHOD FOR OUT OF ORDER LOADS IN A MEMORY CONSISTENCY MODEL USING SHARED MEMORY RESOURCES

LOAD A LOCK-BASED AND SYNCH-BASED METHOD FOR OUT OF ORDER LOADS IN A MEMORY CONSISTENCY MODEL USING SHARED MEMORY RESOURCES

机译:基于共享内存资源的内存一致性模型中无序负载的基于锁和同步的负载方法

摘要

In a processor, it is disclosed a lock-based method for the out-of-order load from memory consistency models using shared memory resources. The method for implementing a memory resource that can be accessed by a plurality of cores; And one word of the cache line that includes the step of implementing access mask function by tracking whether the access via the load, the cache line is a memory resource, load the access mask when accessing the word of the cache line set in the mask bit and a mask bit is to shut off the access from the other load from a plurality of cores. The method includes the steps of checking the access mask at the time of execution of a subsequent store to the cache line from the plurality of cores; And the load by a subsequent store in a portion of a cache line, and further comprising the step of causing a prediction error when viewing the previous mark from a load at an access mask, use of a subsequent store the tracker registers and the thread ID register load will signal a queue entry corresponding to.;
机译:在处理器中,公开了一种基于锁的方法,用于使用共享存储器资源从存储器一致性模型中无序加载。一种实现可以被多个内核访问的存储器资源的方法;高速缓存行的一个字,包括通过跟踪是否通过加载访问,高速缓存行是否是存储器资源来实现访问掩码功能的步骤,当访问在掩码位中设置的高速缓存行的字时,加载访问掩码屏蔽位用于切断来自多个核心的其他负载的访问。该方法包括以下步骤:在执行从多个核到高速缓存行的后续存储时,检查访问掩码;以及并且由高速缓存行的一部分中的后续存储进行的加载,并且还包括以下步骤:当在访问掩码中从加载查看先前的标记时,导致预测错误,使用后续存储的跟踪器寄存器和线程ID寄存器加载将发信号通知对应的队列条目。

著录项

  • 公开/公告号KR101745640B1

    专利类型

  • 公开/公告日2017-06-09

    原文格式PDF

  • 申请/专利权人 인텔 코포레이션;

    申请/专利号KR20157000652

  • 发明设计人 압달라 모하마드;

    申请日2013-06-12

  • 分类号G06F9/38;G06F12/08;

  • 国家 KR

  • 入库时间 2022-08-21 13:25:21

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