Representing unity in a two's complement 1.N fixed point complex number digital signal processor

摘要

A signal processing apparatus (10) comprises: a fixed-point compute unit (30) for operating on fractional 2's complement values without a mantissa; a memory unit (26) for storing a constant complex value to be used by the compute unit (30) to perform a complex arithmetic operation and a mapping unit (62), the mapping unit (62) being configured to map a complex value stored by the memory unit having a particular imaginary component, such as -1, to a value of unity, i.e. +1.