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METHOD, APPARATUS AND SYSTEM USING PERSISTENT MEMORY STORE COMMIT DEMARCATE INSTRUCTION

机译:使用持久性存储器存储提交划界指令的方法,装置和系统

摘要

A processor includes at least one memory controller, and a decode unit to decode a persistent commit demarcate instruction. The persistent commit demarcate instruction is to indicate a destination storage location. The processor also includes an execution unit coupled with the decode unit and the at least one memory controller. The execution unit, in response to the persistent commit demarcate instruction, is to store a demarcation value in the destination storage location. The demarcation value may demarcate at least all first store to persistent memory operations that are to have been accepted to memory when the persistent commit demarcate instruction is performed, but which are not necessarily to have been stored persistently, from at least all second store to persistent memory operations that are not yet to have been accepted to memory when the persistent commit demarcate instruction is performed.
机译:一种处理器,包括至少一个存储器控制器,以及解码单元,用于解码持久提交划界指令。持久提交标界指令用于指示目标存储位置。该处理器还包括与解码单元和至少一个存储器控制器耦合的执行单元。响应于持久提交划界指令,执行单元将划界值存储在目的地存储位置中。划分值可以将至少所有第一存储划分为在执行持久提交划分指令时将已经接受到存储器的持久存储器操作,但是不一定必须已经持久存储,从至少所有第二存储到持久存储执行持久落实划界指令时尚未接受到内存的内存操作。

著录项

  • 公开/公告号EP3109761B1

    专利类型

  • 公开/公告日2018-03-07

    原文格式PDF

  • 申请/专利权人 INTEL CORPORATION;

    申请/专利号EP20160171194

  • 发明设计人 DOSHI KSHITIJ A.;

    申请日2016-05-24

  • 分类号G06F11/14;G06F11;G06F12/0875;

  • 国家 EP

  • 入库时间 2022-08-21 13:17:22

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