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SIMD TYPE PARALLEL ARITHMETIC APPARATUS, SIMD TYPE PARALLEL ARITHMETIC SEMICONDUCTOR CHIP, SIMD TYPE PARALLEL ARITHMETIC METHOD AND APPARATUS INCLUDING SIMD TYPE PARALLEL ARITHMETIC APPARATUS AND SEMICONDUCTOR CHIP
SIMD TYPE PARALLEL ARITHMETIC APPARATUS, SIMD TYPE PARALLEL ARITHMETIC SEMICONDUCTOR CHIP, SIMD TYPE PARALLEL ARITHMETIC METHOD AND APPARATUS INCLUDING SIMD TYPE PARALLEL ARITHMETIC APPARATUS AND SEMICONDUCTOR CHIP
PROBLEM TO BE SOLVED: To provide a SIMD type parallel arithmetic algorism that maximizes an efficiency of parallel operation of the SIMD type (single instruction/multiple data) and increases integration degree, increases a calculation speed by making it possible to drive a calculation core 100%, significantly reducing power consumption, realizing arbitrary degree of parallelism and computation time, and easily installing into a semiconductor ASIC and FPGA.SOLUTION: An arithmetic apparatus 203 configured by a memory cell group 202 consisting of a number of memory cells 104 and N arithmetic units 109 reads data in which one data is configured by two or more memory cells 104 by accessing N pairs at once by an address line 102 for accessing a memory cell 104 of the memory cell group 202, inputs them into an arithmetic input of N arithmetic units 109 in parallel, and writes N pairs of arithmetic result data of arithmetic outputs of the N arithmetic units into the N memory cells 109 at once.SELECTED DRAWING: Figure 2
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