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Thread-by-thread cache line allocation mechanism in partitioned shared cache in multi-thread processor
Thread-by-thread cache line allocation mechanism in partitioned shared cache in multi-thread processor
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机译:多线程处理器中分区共享缓存中的逐线程缓存行分配机制
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摘要
Systems and methods for allocation of cache lines in a shared partitioned cache of a multi-threaded processor. A memory management unit is configured to determine attributes associated with an address for a cache entry associated with a processing thread to be allocated in the cache. A configuration register is configured to store cache allocation information based on the determined attributes. A partitioning register is configured to store partitioning information for partitioning the cache into two or more portions. The cache entry is allocated into one of the portions of the cache based on the configuration register and the partitioning register.
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