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Error resilience router, IC using the same, and control method of error resilience router

机译:防错路由器,使用其的IC以及防错路由器的控制方法

摘要

PROBLEM TO BE SOLVED: To provide an error resistance router in which errors are solved by dealing with three error types (transient, intermittent and permanent types), and a 2D or 3D IC employing the same.SOLUTION: The error resistance router is provided correspondingly to each of a plurality of cores included in the IC. The error resistance router includes: a plurality of input port parts 1-7 corresponding to the cores, respectively; a cross bar 13 for connecting output of the input port parts 1-7 to a predetermined output destination; and an error control module 20 including a prediction table 10. Each input port part includes an input buffer 11, a random access buffer 9 and an error detection circuit for detecting a slot error of the input buffer 11. When the error detection circuit detects the slot error, in the case where the other remaining slots are occupied, a flag is sent to the error control module 20. The prediction table 10 stores traffic information beforehand, selects the best input buffer and notifies the random access buffer 9 of the best input buffer.
机译:要解决的问题:提供一种抗错误路由器,其中通过处理三种错误类型(瞬态,间歇和永久类型)来解决错误,以及采用该类型的2D或3D IC解决方案:相应地提供了抗错误路由器包括在IC中的多个核中的每个核上。防错路由器包括:分别对应于核心的多个输入端口部分1-7;横杆13,用于将输入端口部分1-7的输出连接到预定的输出目的地。误差预测模块20和具有预测表10的误差控制模块20。每个输入端口部分包括输入缓冲器11,随机存取缓冲器9和用于检测输入缓冲器11的插槽误差的误差检测电路。如果时隙错误,则在剩余的其他时隙被占用的情况下,将标志发送给错误控制模块20。预测表10预先存储业务信息,选择最佳输入缓冲器,并将最佳输入通知给随机存取缓冲器9。缓冲。

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