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Method of digital-to-analog converter mismatch calibration in a successive approximation register analog-to-digital converter and a successive approximation register analog-to-digital converter
Method of digital-to-analog converter mismatch calibration in a successive approximation register analog-to-digital converter and a successive approximation register analog-to-digital converter
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机译:逐次逼近寄存器模数转换器和逐次逼近寄存器模数转换器中数模转换器失配校准的方法
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摘要
A method of DAC mismatch calibration in a SAR ADC is disclosed. In one aspect, the method comprises determining a number of bits of an analog input signal (VIN), detecting if a binary code determined from the analog input signal (VIN) matches at least one trigger code, using at least one setting code to determine a calibration residue signal (V*RES) and a calibration bit (B*LSB), analyzing a least significant bit of the digital signal (COUT) and the calibration bit (B*LSB), determining an indication of a presence of DAC mismatch, and calibrating the DAC mismatch. As the determination of the calibration bit (B*LSB) requires only one additional comparison, when compared to the normal operation, the normal operation does not need to be interrupted. Therefore, the calibration can be done in the background and, as such, can be performed frequently thereby taking into account time-varying changes due to environmental effects.
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机译:公开了一种SAR ADC中的DAC失配校准的方法。一方面,该方法包括确定模拟输入信号(V IN Sub>)的位数,检测是否从模拟输入信号(V IN Sub>)确定了二进制代码。 )匹配至少一个触发代码,使用至少一个设置代码确定校准残留信号(V * RES Sub>)和校准位(B * LSB Sub>),进行分析数字信号的最低有效位(C OUT Sub>)和校准位(B * LSB Sub>),确定是否存在DAC不匹配的指示,并校准DAC不匹配。由于校准位(B * LSB Sub>)的确定仅需要进行一次额外的比较,因此与正常操作相比,不需要中断正常操作。因此,可以在后台进行校准,因此可以经常执行校准,从而考虑到由于环境影响而引起的时变变化。
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