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CCIe receiver logic register write only with receiver clock

机译:CCIe接收器逻辑寄存器仅使用接收器时钟进行写

摘要

Methods, apparatus, and computer program products are described, which provide a mechanism that enables data to be written into registers of a slave device without a free-running clock, while facilitating an efficient sleep and wakeup mechanism for slave devices. A receiver device may receive a plurality of symbols over a shared bus, extract a receive clock signal embedded in symbol-to-symbol transitions of the plurality of symbols, convert the plurality of symbols into a transition number, convert the transition number into data bits, and store at least a portion of the data bits into one or more registers using only the receive clock signal. The receiver device may start a down counter upon detection of a first cycle of the clock signal, trigger a marker when the down counter reaches a pre-defined value, and use the marker to store at least a portion of the data bits into registers.
机译:描述了方法,装置和计算机程序产品,这些方法,装置和计算机程序产品提供了一种机制,该机制使得能够在没有自由运行时钟的情况下将数据写入从设备的寄存器中,同时促进了用于从设备的有效睡眠和唤醒机制。接收器设备可以通过共享总线接收多个符号,提取嵌入在多个符号的符号到符号转换中的接收时钟信号,将多个符号转换为转换号,将转换号转换为数据位。 ,并且仅使用接收时钟信号将数据位的至少一部分存储到一个或多个寄存器中。接收器设备可以在检测到时钟信号的第一周期时启动递减计数器,在递减计数器达到预定值时触发标记,并使用该标记将数据比特的至少一部分存储到寄存器中。

著录项

  • 公开/公告号US10031547B2

    专利类型

  • 公开/公告日2018-07-24

    原文格式PDF

  • 申请/专利权人 QUALCOMM INCORPORATED;

    申请/专利号US201414572680

  • 发明设计人 SHOICHIRO SENGOKU;

    申请日2014-12-16

  • 分类号G06F1/04;G06F1/32;G06F13;H04L7;H04L7/027;G06F13/42;

  • 国家 US

  • 入库时间 2022-08-21 13:05:08

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