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Arrangement and method for facilitating electronics design in connection with 3D structures

机译:用于促进与3D结构相关的电子设计的布置和方法

摘要

An electronic arrangement for facilitating circuit layout design in connection with three-dimensional (3D) target designs, the arrangement including at least one communication interface for transferring data, at least one processor for processing instructions and other data, and a memory for storing the instructions and other data. The at least one processor being configured, in accordance with the stored instructions, to cause: obtaining and storing information in a data repository hosted by the memory, receiving design input characterizing 3D target design to be produced from a substrate, determining a mapping between locations of the 3D target design and the substrate, and establishing and providing digital output comprising human and/or machine readable instructions indicative of the mapping to a receiving entity, such as a manufacturing equipment, e.g. printing, electronics assembly and/or forming equipment.
机译:一种用于促进与三维(3D)目标设计相关的电路布局设计的电子装置,该装置包括至少一个用于传输数据的通信接口,至少一个用于处理指令和其他数据的处理器以及用于存储指令的存储器和其他数据。所述至少一个处理器被配置为根据所存储的指令导致:在由所述存储器托管的数据存储库中获取和存储信息;接收表征要从基板产生的3D目标设计的设计输入;确定位置之间的映射。 3D目标设计和基板的特性,并建立和提供数字输出,其中包含指示映射到接收实体(例如制造设备)的人和/或机器可读指令的数字输出印刷,电子组装和/或成型设备。

著录项

  • 公开/公告号US10055530B1

    专利类型

  • 公开/公告日2018-08-21

    原文格式PDF

  • 申请/专利权人 TACTOTEK OY;

    申请/专利号US201715840647

  • 申请日2017-12-13

  • 分类号G06F17/50;B33Y10;B33Y70;B33Y50/02;B29C64/393;B29C64/112;B29L31/34;B29K101/12;

  • 国家 US

  • 入库时间 2022-08-21 13:04:26

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