首页> 外国专利> DELAY SIGNAL GENERATING APPARATUS USING GLITCH FREE DIGITALLY CONTROLLED DELAY LINE AND ASSOCIATED DELAY SIGNAL GENERATING METHOD

DELAY SIGNAL GENERATING APPARATUS USING GLITCH FREE DIGITALLY CONTROLLED DELAY LINE AND ASSOCIATED DELAY SIGNAL GENERATING METHOD

机译:使用无故障数字控制的延迟线和相关延迟信号生成方法的延迟信号生成装置

摘要

A delay signal generating apparatus has a digitally controlled delay line and a control circuit. The digitally controlled delay line has a coarse delay circuit and a fine delay circuit. The coarse delay circuit generates a plurality of coarse delay signals by applying a plurality of different coarse delay amounts to an input signal, respectively, wherein the different coarse delay amounts are set by a first control input. The fine delay circuit generates a fine delay signal having a fine delay amount with respect to the input signal by performing phase interpolation based on the coarse delay signals, wherein the fine delay amount is set by a second control input. The control circuit generates the first control input to the coarse delay circuit, and generates the second control input to the fine delay circuit, wherein the control circuit does not change the first control input unless one of the coarse delay signals has no contribution to the fine delay signal according to the second control input.
机译:延迟信号产生装置具有数控延迟线和控制电路。数控延迟线具有粗延迟电路和细延迟电路。粗延迟电路通过分别向输入信号施加多个不同的粗延迟量来生成多个粗延迟信号,其中,不同的粗延迟量由第一控制输入设定。精细延迟电路通过基于粗略延迟信号执行相位内插来生成相对于输入信号具有精细延迟量的精细延迟信号,其中精细延迟量由第二控制输入设置。控制电路生成到粗延迟电路的第一控制输入,并且生成到精细延迟电路的第二控制输入,其中,除非其中一个粗延迟信号对精细控制没有贡献,否则控制电路不会改变第一控制输入。根据第二控制输入的延迟信号。

著录项

  • 公开/公告号US2018198439A1

    专利类型

  • 公开/公告日2018-07-12

    原文格式PDF

  • 申请/专利权人 MEDIATEK INC.;

    申请/专利号US201715404166

  • 发明设计人 CHIH-LUN CHUANG;YING-YU HSU;

    申请日2017-01-11

  • 分类号H03K5/133;H03K5/131;

  • 国家 US

  • 入库时间 2022-08-21 13:01:15

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