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SUCCESSIVE APPROXIMATION REGISTER ANALOG-DIGITAL CONVERTER HAVING A SPLIT-CAPACITOR BASED DIGITAL-ANALOG CONVERTER
SUCCESSIVE APPROXIMATION REGISTER ANALOG-DIGITAL CONVERTER HAVING A SPLIT-CAPACITOR BASED DIGITAL-ANALOG CONVERTER
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机译:具有基于分电容器的数字模拟转换器的逐次逼近型注册模拟数字转换器
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摘要
A successive approximation register analog-digital converter including a split-capacitor based digital-analog converter includes a comparator, a split-capacitor based digital-analog converter including a positive capacitor array and a negative capacitor array, and a successive approximation register logic. The positive capacitor array and the negative capacitor array each includes a positive capacitor array of a first stage and a negative capacitor array of a first stage that generate input signals of the comparator corresponding to upper bits including an MSB, respectively, a positive capacitor array of a second stage and a negative capacitor array of a second stage that generate input signals corresponding to intermediate bits, and a positive capacitor array of a third stage and a negative capacitor array of a third stage that generate input signals corresponding to lower bits of an LSB and a next to bit of the LSB.
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