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Delta-sigma modulator and method for enhancing stability of delta-sigma modulator

机译:Δ-∑调制器和增强Δ-∑调制器的稳定性的方法

摘要

A delta-sigma modulator includes a receiving circuit, a loop filter, a quantizer with a negative capacitor circuit and a feedback circuit. The receiving circuit is arranged for receiving an input signal and a feedback signal to generate a first signal. The loop filter is coupled to the receiving circuit, and is arranged for receiving the first signal to generate a filtered signal. The quantizer is coupled to the loop filter, and is arranged for generating a digital output signal according to the filtered signal, wherein the negative capacitor circuit is arranged at an input terminal of the quantizer. The feedback circuit is arranged for receiving the digital output signal to generate the feedback signal.
机译:Δ-∑调制器包括接收电路,环路滤波器,具有负电容器电路的量化器和反馈电路。接收电路被布置为接收输入信号和反馈信号以产生第一信号。环路滤波器耦合到接收电路,并且被布置为接收第一信号以生成滤波后的信号。量化器耦合到环路滤波器,并且被布置用于根据滤波后的信号生成数字输出信号,其中负电容器电路被布置在量化器的输入端子处。反馈电路被布置用于接收数字输出信号以生成反馈信号。

著录项

  • 公开/公告号US9948318B1

    专利类型

  • 公开/公告日2018-04-17

    原文格式PDF

  • 申请/专利权人 MEDIATEK INC.;

    申请/专利号US201715784198

  • 发明设计人 HUNG-CHIEH TSAI;

    申请日2017-10-16

  • 分类号H03M3/00;

  • 国家 US

  • 入库时间 2022-08-21 12:58:53

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