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SYSTEM-ON-CHIP (SoC) ASSEMBLY, CONFIGURABLE IP GENERATION AND IP INTEGRATION UTILIZING DISTRIBUTED COMPUTER SYSTEMS
SYSTEM-ON-CHIP (SoC) ASSEMBLY, CONFIGURABLE IP GENERATION AND IP INTEGRATION UTILIZING DISTRIBUTED COMPUTER SYSTEMS
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机译:片上系统(SoC)组件,可利用分布式计算机系统进行可配置的IP生成和IP集成
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摘要
An architecture-specific web-based executable specification tool maintains specification information and metadata for chip and system on a chip (SoC) design. Metadata available in the development ecosystem may be leveraged to improve the specification-to-design process. A unified, integrated environment for subsystem creation, SoC integration, and SoC specification teams is presented using a tool that comprehends SoC constructs. A modern web-based framework (not stand-alone tool) provides collaboration capabilities and allows visual representation and manipulation of data. Connection fabrics (e.g., network on a chip (NoC)) and other project-specific infrastructure can be configured and synthesized on demand and brought in to the design using the common environment. Netlists and other connectivity data can be fed into automated RTL generation processes directly, or used as a reference for implementation design teams. Reports and automated software generation satisfy the needs of the design verification and software teams. Functional and performance testing feedback loops are also provided.
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