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Power on reset circuit applied to gate driver of display apparatus

机译:应用于显示装置的栅极驱动器的上电复位电路

摘要

A power on reset circuit applied to a gate driver of a display apparatus is disclosed. The power on reset circuit is coupled between an operating voltage and a ground terminal. The power on reset circuit includes an output terminal, a first transistor, a second transistor, a resistor, and a buffer circuit. The first transistor is coupled between the operating voltage and a first node. A gate of first transistor is coupled to the first node. The second transistor is coupled between the operating voltage and the first node. A gate of second transistor is coupled to the ground terminal. The resistor is coupled between the first node and ground terminal. The buffer circuit is coupled between the first node and output terminal and outputs a reset signal through the output terminal. A second threshold voltage of second transistor is larger than a first threshold voltage of first transistor.
机译:公开了一种应用于显示设备的栅极驱动器的上电复位电路。上电复位电路耦合在工作电压和接地端子之间。上电复位电路包括输出端子,第一晶体管,第二晶体管,电阻器和缓冲电路。第一晶体管耦合在工作电压和第一节点之间。第一晶体管的栅极耦合到第一节点。第二晶体管耦合在工作电压和第一节点之间。第二晶体管的栅极耦合到接地端子。电阻器耦合在第一节点和接地端子之间。缓冲电路耦合在第一节点和输出端子之间,并通过输出端子输出复位信号。第二晶体管的第二阈值电压大于第一晶体管的第一阈值电压。

著录项

  • 公开/公告号US9954520B2

    专利类型

  • 公开/公告日2018-04-24

    原文格式PDF

  • 申请/专利权人 RAYDIUM SEMICONDUCTOR CORPORATION;

    申请/专利号US201615164708

  • 发明设计人 KAI-LAN CHUANG;

    申请日2016-05-25

  • 分类号H03K17/22;G09G3/20;

  • 国家 US

  • 入库时间 2022-08-21 12:57:33

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