首页> 外国专利> Semiconductor devices including an etch stop pattern and a sacrificial pattern with coplanar upper surfaces and a gate and a gap fill pattern with coplanar upper surfaces

Semiconductor devices including an etch stop pattern and a sacrificial pattern with coplanar upper surfaces and a gate and a gap fill pattern with coplanar upper surfaces

机译:半导体器件包括具有共面上表面的蚀刻停止图案和牺牲图案以及具有共面上表面的栅极和间隙填充图案

摘要

Semiconductor devices and methods of manufacturing semiconductor devices. A semiconductor device includes a metal gate electrode stacked on a semiconductor substrate with a gate insulation layer disposed therebetween, spacer structures disposed on the semiconductor substrate at both sides of the metal gate electrode, source/drain regions formed in the semiconductor substrate at the both sides of the metal gate electrode, and an etch stop pattern including a bottom portion covering the source/drain regions and a sidewall portion extended from the bottom portion to cover a portion of sidewalls of the spacer structures, in which an upper surface of the sidewall portion of the etch stop pattern is positioned under an upper surface of the metal gate electrode.
机译:半导体器件和制造半导体器件的方法。半导体器件包括:金属栅电极,其堆叠在半导体衬底上,栅极绝缘层设置在其间;间隔物结构,布置在金属栅电极两侧的半导体衬底上;源/漏区,形成在半导体衬底的两侧。金属栅电极的一部分;蚀刻停止图案,其包括覆盖源极/漏极区域的底部和从该底部延伸以覆盖间隔物结构的侧壁的一部分的侧壁部分,其中侧壁部分的上表面蚀刻停止图案的一部分位于金属栅电极的上表面下方。

著录项

  • 公开/公告号US9966432B2

    专利类型

  • 公开/公告日2018-05-08

    原文格式PDF

  • 申请/专利权人 SANGJINE PARK;BOUN YOON;JEONGNAM HAN;

    申请/专利号US201615010470

  • 发明设计人 SANGJINE PARK;JEONGNAM HAN;BOUN YOON;

    申请日2016-01-29

  • 分类号H01L29/66;H01L29/08;H01L21/8234;H01L29/78;H01L23/535;H01L29/16;H01L29/165;H01L29/45;H01L29/417;

  • 国家 US

  • 入库时间 2022-08-21 12:55:10

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