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analog to digital converter and method of analog to digital conversion.

机译:模数转换器和模数转换方法。

摘要

Embodiments of the present invention disclose an analog-digital converter and an analog-to-digital conversion method. The analog-digital converter includes: a clock generator, including M transmission gates, where the M transmission gates are configured to receive a first clock signal that is periodically sent and separately perform gating control on the first clock signal, so as to generate M second clock signals, M is an integer that is greater than or equal to 2, each period of the first clock signal comprises M clock pulses, a period of the M second clock signals is equal to the period of the first clock signal, each period of the M second clock signals includes one clock pulse of the M clock pulses; M ADC channels that are configured in a time interleaving manner, configured to receive one analog signal and separately perform, under the control of the M second clock signals, sampling and analog-to-digital conversion on the analog signal, so as to obtain M digital signals, where each ADC channel is corresponding to one clock signal of the M second clock signals; and an adder, configured to add the M digital signals together in a digital field, so as to obtain a digital output signal.
机译:本发明的实施例公开了一种模数转换器和模数转换方法。所述模数转换器包括:时钟发生器,包括M个传输门,其中,所述M个传输门被配置为接收周期性发送的第一时钟信号,并分别对所述第一时钟信号进行选通控制,以产生Msecond时钟信号,M是大于或等于2的整数,第一时钟信号的每个周期包括M个时钟脉冲,M个第二时钟信号的周期等于第一时钟信号的周期,每个周期为M个第二时钟信号包括M个时钟脉冲中的一个时钟脉冲。 M个以时间交织方式配置的ADC通道,被配置为接收一个模拟信号,并在所述M个第二时钟信号的控制下分别对所述模拟信号进行采样和模数转换,以获得M数字信号,每个ADC通道对应于M个第二时钟信号中的一个时钟信号;加法器,用于将所述M个数字信号在一个数字场中相加,得到数字输出信号。

著录项

  • 公开/公告号BR112017013835A2

    专利类型

  • 公开/公告日2018-06-19

    原文格式PDF

  • 申请/专利权人 HUAWEI TECHNOLOGIES CO. LTD.;

    申请/专利号BR20171113835

  • 发明设计人 JINDA YANG;LIREN ZHOU;

    申请日2015-11-26

  • 分类号H03M1/12;

  • 国家 BR

  • 入库时间 2022-08-21 12:53:44

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