- - AN APPARATUS FOR BIT-SERIAL MULTIPLY-ACCUMULATION WITH DAC AND ADC

摘要

The present invention relates to a technique for performing several multiplication-accumulation operations with low power in parallel when implementing a bit-serial multiplication-accumulation operator using a digital-to-analog converter and an analog-to-digital converter. To this end, multiple bits are transmitted with a bit-serial method by using a serial converter. The multiplication of one bit is generated in parallel by using several AND gates and several one bit multiplication-accumulation operations are performed in an analog region through a unary system at once. A calculation result is converted into a digital value through the analog-to-digital converter. After the digital value is arithmetically shifted to be matched with a corresponding digit, the digital value is accumulated, thereby obtaining a final result.