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POWER MANAGER WITH A POWER SWITCH ARBITER

机译:带电源开关的电源管理器

摘要

An arbitrator governs an arbitration between different power domains and sequences powering up the different power domains supplied by the same voltage supply (VS) circuit on the Chip. The arbitrator has sequencing logic that limits how many different power domains simultaneously power up to a maximum amount, which is less than enough instantaneous electrical current drawn on the VS-circuit to cause a reduction below a minimum allowable supply voltage level for the VS-circuit. The sequencing logic manages the sequencing of powering up the different power domains by factoring in i) whether different power domains arbitrating to power up are part of a set of power domains that share the VS-circuit, ii) an amount of an instantaneous electrical current drawn, and iii) an amount of credits available before the minimum allowable supply voltage level occurs for that VS-circuit. The sequencing logic controls a behavior of the power domains when powering up from multiple different behaviors.
机译:仲裁器控制着不同电源域之间的仲裁,并为芯片上同一电压源(VS)电路所提供的不同电源域上电的序列供电。仲裁器具有排序逻辑,该逻辑限制了有多少个不同的电源域同时上电至最大数量,该数量小于VS电路上吸收的瞬时电流,不足以使电压降低到VS电路的最小允许电源电平以下。排序逻辑通过考虑以下因素来管理对不同电源域上电的排序:i)仲裁进行上电的不同电源域是否是共享VS电路的一组电源域的一部分,ii)瞬时电流量iii)在该VS电路的最小允许电源电压水平出现之前的可用信用额度。当从多个不同行为上电时,排序逻辑控制电源域的行为。

著录项

  • 公开/公告号EP3308244A4

    专利类型

  • 公开/公告日2019-04-24

    原文格式PDF

  • 申请/专利权人 SONICS INC.;

    申请/专利号EP20160808382

  • 申请日2016-06-10

  • 分类号G06F1/26;

  • 国家 EP

  • 入库时间 2022-08-21 12:29:25

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