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NEW SSD BASIC STRUCTURE FOR FPGA-BASED ACCELERATION
NEW SSD BASIC STRUCTURE FOR FPGA-BASED ACCELERATION
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机译:用于基于FPGA的加速的新SSD基本结构
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摘要
To provide an SSD system which can accelerate load of data from an SSD to a memory.SOLUTION: The present invention includes: a CPU for executing an application; a memory for storing data used by an application being executed on the CPU; an upstream I/F for communicating with the CPU; a downstream I/F for communicating with a storage device; and an acceleration module realized by hardware, the acceleration module having an acceleration platform manager, APFM for executing an acceleration command. The storage device includes: an end point for the storage device for communicating with the acceleration module; a controller for managing the operation of the storage device; a store for storing application data for the application; and the APFM for the storage device helping the APFM of the acceleration module when the acceleration command is executed. The CPU, the acceleration module, and the storage device communicate via a PCIe bus. The acceleration module executes the acceleration command without loading the application data on the storage device into the memory.SELECTED DRAWING: Figure 1
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