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Circuit and method for filtering intersymbol interference for SERDES applications

机译:SERDES应用中用于过滤符号间干扰的电路和方法

摘要

A circuit for filtering inter-symbol interference in an integrated circuit is described. The circuit comprises a first stage coupled to receive digital samples of an input signal. The first stage generates first decision outputs based upon the digital samples. A second stage is coupled to receive the digital samples of the input signal. The second stage comprises a filter receiving the first decision outputs and generating second decision outputs based upon the digital samples of the input signal and detected inter-symbol interference associated with the first decision outputs. A method of filtering inter-symbol interference in an integrated circuit is also described.
机译:描述了一种用于过滤集成电路中的符号间干扰的电路。该电路包括耦合以接收输入信号的数字样本的第一级。第一级基于数字样本生成第一判定输出。第二级被耦合以接收输入信号的数字样本。第二级包括滤波器,该滤波器接收第一判定输出并基于输入信号的数字采样以及与第一判定输出相关联的检测到的符号间干扰来生成第二判定输出。还描述了一种在集成电路中过滤符号间干扰的方法。

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