首页>
外国专利>
Successive approximation register (SAR) analog to digital converter (ADC) with partial loop-unrolling
Successive approximation register (SAR) analog to digital converter (ADC) with partial loop-unrolling
展开▼
机译:具有部分环路展开功能的逐次逼近寄存器(SAR)模数转换器(ADC)
展开▼
页面导航
摘要
著录项
相似文献
摘要
A receiver system that includes an ADC for converting analog values to digital representations. A digital representation is a sum of discrete values some of which are non-binary scaled and the other are binary scaled. The ADC includes dedicated comparators to determine whether to add or to subtract the non-binary scaled values. A comparator is used to determine whether to add or to subtract the binary scaled values. The ADC further calibrates offset voltages of the comparators to substantially remove dead zone and conversion errors, without compromising the conversion speed. The calibration can be performed both in foreground and background.
展开▼