首页> 外国专利> Photonic crystal all-optical multistep-delay and-transformation logic gate

Photonic crystal all-optical multistep-delay and-transformation logic gate

机译:光子晶体全光多步延迟变换逻辑门

摘要

The present invention discloses a photonic crystal (PhC) all-optical multistep-delay AND-transformation logic gate, which comprises a PhC-structure unit, an optical-switch unit (OSU), a wave-absorbing load, a NOT-logic gate, a D-type flip-flop (DFF) and a memory or delayer; an input port of a memory is connected with a first logic-signal X1, and an output port of the memory is connected with the delay-signal-input port of the OSU; a second logic-signal X2 is connected with the logic-signal-input port of the OSU; two intermediate-signal-output ports of the OSU are respectively the intermediate-signal-input port of the PhC-structure unit and the wave-absorbing load; a clock-signal CP is connected with the input port of a three-branch waveguide; the signal-output port of the PhC-structure unit is connected with the D-signal-input port of the DFF unit. The structure of the present invention is compact in structure and ease of integration with other optical-logic elements.
机译:本发明公开了一种光子晶体(PhC)全光多步延迟与变换逻辑门,包括PhC结构单元,光开关单元(OSU),吸波负载,非逻辑门,D型触发器(DFF)和存储器或延迟器;存储器的输入端口与第一逻辑信号X 1 相连,存储器的输出端口与OSU的延迟信号输入端口相连。第二逻辑信号X 2 与OSU的逻辑信号输入端口相连。 OSU的两个中间信号输出端口分别是PhC结构单元的中间信号输入端口和吸波负载。时钟信号CP与三分支波导的输入端口连接。 PhC结构单元的信号输出端口与DFF单元的D信号输入端口连接。本发明的结构结构紧凑并且易于与其他光学逻辑元件集成。

著录项

  • 公开/公告号US10338311B2

    专利类型

  • 公开/公告日2019-07-02

    原文格式PDF

  • 申请/专利权人 ZHENGBIAO OUYANG;

    申请/专利号US201715626239

  • 发明设计人 ZHENGBIAO OUYANG;QUANQIANG YU;

    申请日2017-06-19

  • 分类号G02B6/122;G02F3;G02F1/365;G02B6/125;G02B6/12;

  • 国家 US

  • 入库时间 2022-08-21 12:14:38

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