ECC and read adjustment based on dynamic memory error model estimation

摘要

A device includes a memory and a controller coupled to the memory. The controller is configured to determine a first count of bits of a representation of data that are estimated to be erroneous and a second count of bits of the representation of data that have high estimated reliability and are estimated to be erroneous. The controller is further configured to modify at least one read parameter or at least one decode parameter based on the first count and the second count.