首页> 外国专利> Flexible constraint integrated circuit implementation runs

Flexible constraint integrated circuit implementation runs

机译:灵活的约束集成电路实施运行

摘要

Technologies are provided for automatically performing multiple integrated circuit implementation runs with variations of input design constraints. Input design constraints can be automatically adjusted to create multiple modified versions of the design constraints. The multiple modified design constraints can be used to perform separate integrated circuit implementation runs for a given circuit design. Results of the multiple implementation runs can be analyzed, and a circuit implementation report can be generated based on the results of the runs performed with the various modified design constraints. In some embodiments, a circuit implementation recommendation can be generated based on the implementation run results. In at least some scenarios, the multiple implementation runs can be performed using multiple synthesis and implementation processes. The multiple synthesis and implementation processes can be distributed across one or more host computing devices.
机译:提供了用于在输入设计约束变化的情况下自动执行多个集成电路实现运行的技术。输入设计约束可以自动调整以创建设计约束的多个修改版本。对于给定的电路设计,可以使用多个修改的设计约束条件来执行单独的集成电路实现运行。可以分析多个实施运行的结果,并且可以基于在各种修改的设计约束条件下执行的运行结果来生成电路实施报告。在一些实施例中,可以基于实施运行结果来生成电路实施推荐。在至少一些场景中,可以使用多个综合和实现过程来执行多个实现运行。多个合成和实现过程可以分布在一个或多个主机计算设备上。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号