首页> 外国专利> METHOD FOR OPTIMIZING MEMORY ACCESS IN A MICROPROCESSOR INCLUDING SEVERAL LOGIC CORES UPON RESUMPTION OF EXECUTING AN APPLICATION, AND COMPUTER IMPLEMENTING SUCH A METHOD

METHOD FOR OPTIMIZING MEMORY ACCESS IN A MICROPROCESSOR INCLUDING SEVERAL LOGIC CORES UPON RESUMPTION OF EXECUTING AN APPLICATION, AND COMPUTER IMPLEMENTING SUCH A METHOD

机译:一种在恢复执行应用程序时优化包括多个逻辑核心的微处理机中的内存访问的方法,以及一种实现该方法的计算机

摘要

The invention relates in particular to optimizing memory access in a microprocessor including several logic cores upon the resumption of executing a main application, and enabling the simultaneous execution of at least two processes in an environment including a hierarchically organized shared memory including a top portion and a bottom portion, a datum being copied from the bottom portion to the top portion for processing by the application. The computer is adapted to interrupt the execution of the main application. Upon an interruption in the execution of said application, a reference to a datum stored in a top portion of the memory is stored, wherein said datum must be used in order to enable the execution of the application. After programming a resumption of the execution of the application and before the resumption thereof, said datum is accessed in a bottom portion of the memory in accordance with the reference to be stored in a top portion of the memory.
机译:本发明尤其涉及在恢复执行主应用程序时优化包括几个逻辑核的微处理器中的存储器访问,并且使得能够在包括具有顶部和顶部的分层组织的共享存储器的环境中同时执行至少两个处理。底部,将数据从底部复制到顶部,以供应用程序处理。该计算机适于中断主应用程序的执行。在所述应用程序的执行被中断时,存储对存储在存储器的顶部中的数据的引用,其中必须使用所述数据以便能够执行应用程序。在对应用程序的执行进行恢复编程之后并且在其恢复之前,根据该基准在存储器的底部中访问所述数据,以将其存储在存储器的顶部中。

著录项

  • 公开/公告号US2019087227A1

    专利类型

  • 公开/公告日2019-03-21

    原文格式PDF

  • 申请/专利权人 BULL SAS;

    申请/专利号US201816026520

  • 申请日2018-07-03

  • 分类号G06F9/50;G06F9/46;G06F12/0862;G06F9/30;G06F12/0842;G06F8/41;G06F12/0806;

  • 国家 US

  • 入库时间 2022-08-21 12:06:27

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