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METHODS AND APPARATUS TO FACILITATE FIELD-PROGRAMMABLE GATE ARRAY SUPPORT DURING RUNTIME EXECUTION OF COMPUTER READABLE INSTRUCTIONS
METHODS AND APPARATUS TO FACILITATE FIELD-PROGRAMMABLE GATE ARRAY SUPPORT DURING RUNTIME EXECUTION OF COMPUTER READABLE INSTRUCTIONS
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机译:在计算机可读指令的运行时间中促进现场可编程门阵列支持的方法和装置
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摘要
Methods, apparatus, systems, and articles of manufacture to facilitate field-programmable gate array support during runtime execution of computer readable instructions are disclosed herein. An example apparatus includes a compiler to, prior to runtime, compile a block of code written as high level source code into a first hardware bitstream kernel and a second hardware bitstream kernel; a kernel selector to select the first hardware bitstream kernel based on an attribute to be dispatched during runtime; a dispatcher to dispatch the first hardware bitstream kernel to a field programmable gate array (FPGA) during runtime; and the kernel selector to, when an FPGA attribute does not satisfy a threshold during runtime, adjust the selection of the first hardware bitstream kernel to the second hardware bitstream kernel to be dispatched during runtime.
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