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METHODS FOR PERFORMING REGISTER RETIMING WITH HYBRID INITIAL STATES

机译:混合初始状态下执行寄存器重定的方法

摘要

An integrated circuit design may include registers and combinational logic. Integrated circuit design computing equipment may perform retiming for the circuit design, where registers are moved across one or more portions of the combinational logic. The registers may be retimed while considering hybrid initial states of the registers. At least some of the registers may have don't-care initial states. When performing backward retiming, initial states of the retimed registers may be computed that is consistent with the original initial state and functionality of the combinational logic while maximizing the number of don't-care initial states. When performing forward retiming across non-justifiable combinational elements, any don't-care initial states may be assumed to be equal to a deterministic binary value, and the initial states of the retimed registers may be computed that is consistent with the original initial states and functionality of the combinational logic.
机译:集成电路设计可以包括寄存器和组合逻辑。集成电路设计计算设备可以执行电路设计的重定时,其中寄存器在组合逻辑的一个或多个部分之间移动。在考虑寄存器的混合初始状态时,可以对寄存器重新计时。至少某些寄存器可能不关心初始状态。当执行向后重定时时,可以计算重定时寄存器的初始状态,该初始状态与原始初始状态和组合逻辑的功能一致,同时最大化了无关的初始状态的数量。当跨不可调整的组合元素执行正向重定时时,任何无关紧要的初始状态都可以假定为等于确定性二进制值,并且重新定时寄存器的初始状态可以计算为与原始初始状态一致和组合逻辑的功能。

著录项

  • 公开/公告号US2018349544A1

    专利类型

  • 公开/公告日2018-12-06

    原文格式PDF

  • 申请/专利权人 INTEL CORPORATION;

    申请/专利号US201715610223

  • 发明设计人 MAHESH A. IYER;IAN MILTON;DAI LE;

    申请日2017-05-31

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 12:04:07

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